I am having to correct, with alarming regularity, confusion regarding the endianness of modern PowerPC and POWER chips. This article is going to answer a lot of those questions, with facts and citations.
- What endianness are modern PowerPC / POWER CPUs, including POWER9?
- Fact: All POWER Architecture processors since POWER3 support both big and little endian modes. This is because the PowerPC ISA defines an endian-switch bit in a processor control register (MSR), and all POWER processors since POWER3 implement the PowerPC ISA. The PowerPC ISA dates back to the 1990s, where AIX and Linux were exclusively big endian and Windows NT (yes, Windows NT) ran on PowerPC in little endian mode. Most POWER hardware, and most PowerPC computers, historically had firmware that only supported big endian mode. Reports are that POWER4 and POWER5 chips do not support setting the MSR because no firmware supports this mode, but I have no citation to confirm nor deny this. (My IBM POWER hardware starts at POWER6.) This has changed with POWER8, and now modern computers support both. POWER8 and POWER9 can run in either endian, though they still default to big endian during initial bootup (and the firmware services are still in big endian, requiring a byteswap for little endian OSes).
- Isn’t Linux only being developed for PowerPC on little endian now?
- Fact: The Linux kernel supports both endians equally.
- Didn’t Debian drop support for big endian PowerPC with Jessie?
- Fact: Debian still “actively supports” big endian 64-bit PowerPC; it is not a release architecture because it does not have enough dedicated maintainers. The port is still fully functional and is kept up to date.
- When you buy a new POWER computer, aren’t your only choices of operating system little endian?
- Fact: In addition to Debian’s big endian port, there are plenty of other operating systems that support big endian. Gentoo’s PPC64 profile is bi-endian in nature. FreeBSD and Adélie Linux are exclusively big endian, and support all the modern features of POWER9 including DARN, Radix MMU, and more. Devuan is currently adding PPC64 support for both endians.
- Isn’t IBM (or OpenPOWER, or [another member organisation of OpenPOWER]) investing solely in little endian for the future?
- Fact: OpenPOWER is dedicated to supporting development of both BE and LE.
Hiya, sorry it took a little while to respond, I wanted to research a little. TL:DR; from an OpenPOWER standpoint we’d want to support both LE and BE development. I can’t speak for IBM, but given AIX and i are BE, unlikely they’d stop BE support on future chips I’d think. Hth! 🙂
— Hugh Blemings (@hughhalf) August 8, 2018
- Aren’t you stuck with one endian or the other?
- Fact: Linux’s KVM hypervisor lets you run an environment with the opposite endianness of your host. You can freely run either endian on your host and still have the software of the other endianness available to you with no issues.
The Cat Fox Life 
> Linux’s KVM hypervisor lets you run an environment with the opposite endianness of your host.
Is this also true for the 970MP (G5)?
I’ve tried several times to run an LE guest with qemu/KVM, but it always gives me errors and random segfaults.
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Nope, the PPC970 (aka G5) doesn’t support little endian as it was optional in the ISA. This is, why PowerMac G5 doesn’t run virtualPC.
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It for sure doesn’t support the little-endian switch bit, but it’s unclear whether it does or doesn’t support starting and running in little endian mode. What’s for sure is that OpenFirmware supports big endian only,
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It seems like it should, especially considering the Xbox 360 dev units were 970 based and ran LE software. I haven’t tried it personally.
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Where did you hear that? Wasn’t the 360 BE?
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Technically, as far as I can ascertain, there are three levels of little endian support in the POWER ISA:
1. Processor level through MSR LE bit.
2. MMU page level through marking endian on pages.
3. Instruction level with reverse load and save.
From this all POWER models including 970 G5 should support little endian. However, from a search, it looks like IBM stiffed it and did a Motorola again by removing the instruction. The G5 is like the 68060 all over again. So, as long as you don’t have a G5, you have three choices for picking endian! The POWER arch must be one of the best CPUs for forwards and backwards incompatibility. 🙂
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@Damien
Thanks for the clarification, does anyone know if the instruction was removed altogether or disabled – in which case there might be some way in OF to reactivate it (apart from setenv little-endian? true which instantly bricks PM G5s – don’t try it)
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